Graphics FE Integration Engineer

As a GPU Design Integration Engineer, you will be responsible for:

- RTL integration, partitioning, design analysis and qualification.
- Run logic equivalence checking between designs.
- Ensure implementation readiness with RTL lint and custom checks.
- Automate front-end design integration process.
- Understand specifications for design units.
- Collaborate with cross functional teams.

BS required.
Experience with Verilog/System Verilog.

Experience with logic design principles.
Experience with RTL analysis using Invio or other tools.
Knowledge of synthesis, PNR and STA tools and flows.
Familiarity with GPU/CPU/SIMD Architecture and micro-architecture.
Ability to work well in a team and be productive under aggressive schedules
Relevant coursework in computer architecture, digital logic design and VLSI design.
Proficiency in programming techniques and scripting languages (Perl/Ruby/Python).

Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You’ll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you’ll be crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices. As a member of GPU FE Design integration team, you will create GPU RTL by integrating various IPs following architectural parameters, physical constraints, DFT logic and power intent.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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Apple accepts applications to this posting on an ongoing basis.