at Apple
Location
Sunnyvale, United States of America
Compensation
$150k–$278k USD
Type
full time
Posted
3 weeks ago
Market range · company + function + seniority
p25 · target · p75 · n=800
Posted $278k · in the market band
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As an ASIC Design Engineer on the ANE DMA Design team, you will own the design of DMA
subsystem blocks from microarchitecture specification through tapeout. ANE DMA's scale
and complexity means grappling with: fetch sequencing, out-of-order response management,
memory system back-pressure, address translation integration, and pipeline hazard
resolution. In this front-end design role, your work will include:
- Taking end-to-end ownership of DMA blocks through the full cycle: microarchitecture
specification, RTL implementation, front-end signoff (synthesis, timing
closure, area and power analysis, linting, LEC), and design verification closure.
- Writing well-parameterized RTL structured for correct synthesis, clean timing, and low
power, along with assertions and cover points that encode design intent and ensure
verification completeness.
- Collaborating with fellow designers, architecture, and physical implementation teams to
explore microarchitectural trade-offs and drive solutions that meet performance, power,
and area targets.
- Working closely with design verification and formal verification teams to ensure
functional correctness: reviewing test plans, debugging failures, and ensuring the
design's intended behavior is fully exercised.
Bachelors Degree plus 3 years of industry experience
Experience designing SoC front-end RTL in Verilog or SystemVerilog through at least
one tapeout, including tasks such as synthesis, timing closure, area and power analysis,
linting, and logic equivalence checks.
Experience designing DMA microarchitecture: address sequencing, flow control,
arbitration, or transaction ordering.
Experience with on-chip bus protocols (AMBA AXI, AHB, APB) and on-chip interconnect
fabrics.
Background in adjacent domains: hardware compression, networking SoCs, image and video
processing, multimedia, or AI/ML accelerators.
Experience writing precise micro-architectural specifications.
Familiarity with scripting languages (Python, Perl, Tcl) for design automation.
Computational photography, live language translation, and countless other on-device AI
capabilities depend on moving enormous amounts of data between memory and compute at
exactly the right time. As part of our Silicon Engineering Group, you will own the design
of high-performance DMA engines responsible for moving model weights and activation tensors
between the memory subsystem and the Apple Neural Engine.
In this role, you will take end-to-end ownership of DMA subsystem blocks and collaborate
closely with architecture and verification teams across the full front-end design cycle.
The work you deliver ships in Apple products used by billions of people every day.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant
At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Learn about accessibility in Apple’s workplace
Learn about reasonable accommodations for job applicants
Apple accepts applications to this posting on an ongoing basis.
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