Director of Silicon Design for MEM/PCIE COE

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

The Center of Excellence (COE), part of the Custom Compute and Storage (CCS) Business Unit within Marvell's Data Center Group, is chartered to define, develop, and maintain standard, production-ready IP subsystems — spanning PCIe/CXL, Ethernet, DDR/Memory, Security/Boot, Low-Speed IO, and other critical technologies — that customers and internal SoC teams can adopt with confidence. By shifting left, the COE enables faster time-to-market, reduces integration risk, and ensures compliance, interoperability, and high performance across Marvell's SoC products. It embodies the "One Marvell" principle — sharing reusable components, verification environments, and knowledge across all business units to drive first-pass-right silicon. As part of the COE, you will design, verify, and deliver IP subsystem building blocks powering Marvell's most advanced custom chips for hyperscale cloud, AI, and data center customers — working at the intersection of architecture, RTL design, verification, firmware/software, and silicon validation.

What You Can Expect

- Define and scales RTL development, drive reuse across IP and programs

- Owns delivery of end-to-end PCIE/CXL and Memory subsystem RTL design execution and sign off

- Collaborates with architecture, DV, firmware, SOC and post-silicon teams to influence specifications early and reduce downstream risk.

- Manages distributed RTL Design teams, develops technical depth and future leaders.

- Accountable for Design schedules, risk assessment, physical design closure, and transparent communication of tape‑out readiness to senior management and key stakeholders

- Review and resolve cross-program technical issues and escalations

- Engage with ecosystem partners (JEDEC, IP vendors, PHY providers) on interoperability and enablement

What We're Looking For

The Custom Cloud Solutions Group (CCS) is looking for a Silicon Design Technical Director with a demonstrated track record of success in launching products with specific expertise in PCIe and Memory technologies. The person will be responsible for high-quality, predictable delivery of scalable PCIE and Memory subsystems as part of the center of excellence (COE) to all CCS SOC products in 2027 and beyond. A Director of Silicon Design for PCIe and Memory must combine deep protocol expertise, good understanding of silicon design and computer architecture, knowledge of physical design, experience in power and performance optimization and strong people management to ensure A0 silicon production for complex SoCs. Requirements include:

- BS/MS/PhD in Computer Science, Electrical Engineering, or Computer Engineering with 10-15 years of relevant professional experience.
- Proven experience delivering complex PCIE/CXL and/or Memory subsystems from architecture through RTL closure

- Strong experience in System Verilog RTL development, physical design convergence, power and performance optimization and silicon bring up.
- Experience with EDA verification and debugging tools, scripting languages such as Python or Perl, and revision control systems.
- Effective communication and teamwork skills
- Mindset for high quality and attention to detail
- Independent learner, proactive in problem-solving and finding creative solutions

- a good understanding of PCIE/CXL architectures and memory technologies (DDR, LPDDR, HBM).

- Proven track record of owning complex subsystems end-to-end across multiple products.

- Proven track record of leading distributed, diverse teams across sites.

Expected Base Pay Range (USD)

185,390 - 277,700, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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