In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive
TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You will be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's
TPU. You will contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on
TPU architecture and its integration within AI/ML-driven systems.
As an SoC Test Infrastructure Engineer, you will drive the post-silicon New Product Introduction (
NPI) and high-volume manufacturing test strategies for Google's next-generation
TPU and High-Performance Computing (
HPC) products. In this role, you will develop and validate advanced Automated Test Equipment (
ATE) programs, create pre-silicon test solutions, and build automated tools to optimize the entire silicon testing life-cycle.The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're behind Google's groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $163000 - $237000 (USD) + 15% bonus target + equity + benefits
Learn more about
benefits at Google.
Responsibilities
- Collaborate with Architecture, Design, and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies, as well as manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
- Verify test solutions on pre-silicon models (simulation or emulation) and develop ATE test modules, DC tests, binning, production, and characterization flows.
- Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
- Build tools, flows, and methodologies to continuously improve and automate the testing life-cycle.
- Partner with upstream and downstream teams to enable automated solutions to test problems.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience in test engineering.
- Experience in Python, Java, C# or C/C++.
- Experience with Advantest or Teradyne platforms.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in pre-silicon validation, test content generation, ATE program development, and post-silicon enabling from New Product Introduction through High Volume Manufacturing.
- Experience in creating end-to-end manufacturing test strategies for Printed Circuit Board Assembly (PCBA) and systems that cover structural through functional and system tests.