System Performance Modeling Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE:

We are seeking a highly experienced Senior Modeling Engineer to join our engineering team focused on next-generation ASIC and system architecture development.

 

THE PERSON:

In this role, you will develop high-performance models used for ASIC verification, architecture validation, and software development acceleration. The ideal candidate brings deep expertise in C/C++, SystemC modeling, and ARM fast models, along with strong debugging and cross-functional collaboration skills.

KEY RESPONSIBILITIES:

 

• Develop and integrate high-level and cycle-accurate models for complex ASIC and SoC platforms
• Create models to support ASIC verification, architecture exploration, and software development acceleration
• Work closely with ASIC design and verification teams to develop reusable models for validation environments
• Develop transaction-level and cycle-accurate models for arbitration, credit loops, deadlock detection, and performance analysis
• Integrate ARM Fast Models into SystemC-based simulation environments
• Identify and debug architectural, functional, and performance-related issues across hardware and software stacks
• Contribute to system-level modeling efforts using frameworks such as SystemC and OMNeT
• Collaborate with cross-functional engineering teams including architecture, design, verification, and software teams
• Develop automation and scripting solutions to improve modeling and validation workflows

REQUIRED QUALIFICATIONS:

• Experience developing and putting together Models for ASIC verification, and SW development acceleration
• Strong coding experience using C++, STL/Boost libraries
• Experience identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills
• Experience working with ASIC design/verification teams, and creating models that can be used for verification

Preferred Qualifications

• Experience working with ARM fastmodelsand integrating them in a System model
• Experience developing/working with ISAmodels
• Experience developing cycle accurate and transaction levelmodelsto model credit loops, arbitration, detecting deadlocks etc.
• Experience inModelinglibraries like SystemC, OMNeT
• Proficient with scripting languages, C/C++, STL/boost libraries
• Great communication and collaboration skills to interact within the team and with cross functional teams

Desired Skills:

C++, C, SystemC, ARM fast models

Languages: C, C++, Python, SystemC/SystemVerilog

Tools: SystemC, ARM fast models, Boost/STL libraries, OMNeT

 

ACADEMIC CREDENTIALS:

BSEE or equivalent. MSEE preferred

 

LOCATION: 

Santa Clara, CA

 

 

This role is not eligible for visa sponsorship.

 

#LI-BW1

 

#LI-hybrid

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

THE ROLE:

We are seeking a highly experienced Senior Modeling Engineer to join our engineering team focused on next-generation ASIC and system architecture development.

 

THE PERSON:

In this role, you will develop high-performance models used for ASIC verification, architecture validation, and software development acceleration. The ideal candidate brings deep expertise in C/C++, SystemC modeling, and ARM fast models, along with strong debugging and cross-functional collaboration skills.

KEY RESPONSIBILITIES:

 

• Develop and integrate high-level and cycle-accurate models for complex ASIC and SoC platforms
• Create models to support ASIC verification, architecture exploration, and software development acceleration
• Work closely with ASIC design and verification teams to develop reusable models for validation environments
• Develop transaction-level and cycle-accurate models for arbitration, credit loops, deadlock detection, and performance analysis
• Integrate ARM Fast Models into SystemC-based simulation environments
• Identify and debug architectural, functional, and performance-related issues across hardware and software stacks
• Contribute to system-level modeling efforts using frameworks such as SystemC and OMNeT
• Collaborate with cross-functional engineering teams including architecture, design, verification, and software teams
• Develop automation and scripting solutions to improve modeling and validation workflows

REQUIRED QUALIFICATIONS:

• Experience developing and putting together Models for ASIC verification, and SW development acceleration
• Strong coding experience using C++, STL/Boost libraries
• Experience identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills
• Experience working with ASIC design/verification teams, and creating models that can be used for verification

Preferred Qualifications

• Experience working with ARM fastmodelsand integrating them in a System model
• Experience developing/working with ISAmodels
• Experience developing cycle accurate and transaction levelmodelsto model credit loops, arbitration, detecting deadlocks etc.
• Experience inModelinglibraries like SystemC, OMNeT
• Proficient with scripting languages, C/C++, STL/boost libraries
• Great communication and collaboration skills to interact within the team and with cross functional teams

Desired Skills:

C++, C, SystemC, ARM fast models

Languages: C, C++, Python, SystemC/SystemVerilog

Tools: SystemC, ARM fast models, Boost/STL libraries, OMNeT

 

ACADEMIC CREDENTIALS:

BSEE or equivalent. MSEE preferred

 

LOCATION: 

Santa Clara, CA

 

 

This role is not eligible for visa sponsorship.

 

#LI-BW1

 

#LI-hybrid

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

 

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.