at Google
Location
Mountain View, CA, USA
Compensation
$163k–$237k USD
Type
full time
Posted
1 weeks ago
Market range · company + function + seniority
p25 · target · p75 · n=173
Posted $237k · in the market band
Tailor your résumé to this role in 30 seconds.
Free account · ATS keyword check · per-job bullet rewrite by Claude.
In this role, you will serve as the critical link between IP development and SoC integration. You will be responsible for defining and executing the qualification standards that ensure third-party and internal IPs are ready for high-performance silicon designs. You will be developing automated front-end CAD flows, managing complex EDA tool collaterals, and collaborating with cross-functional teams to resolve technical integration bottlenecks. By streamlining the delivery process through advanced scripting and dashboarding, you will directly enable the team to hit dynamic tape-out schedules with high-quality, reliable silicon.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.More open roles at Google
Hiring velocity, headcount trend, and every open posting on one page.
Open postings ranked by description similarity — useful if this role isn't quite right.